The Program Status Registers, or PSRs, in Armv8-M store information about the processor’s current execution state, arithmetic results and active exception.

Armv8-M organizes this information into three primary views: the Application Program Status Register (APSR), Interrupt Program Status Register (IPSR) and Execution Program Status Register (EPSR).

These can also be viewed together through the combined xPSR representation. Together, the registers allow the processor and system software to track condition flags, exception status and execution-state information during normal program execution and interrupt handling.

The APSR primarily contains condition flags generated by arithmetic and logical operations, including the N, Z, C and V flags for negative, zero, carry and overflow conditions, along with additional status information on supporting architecture extensions. These flags are important for conditional operations and evaluating the results of calculations.

The IPSR, by comparison, identifies the currently executing exception or interrupt; a value representing no active exception corresponds to normal Thread-mode execution, while other values identify active system or external exceptions.

This makes the IPSR particularly useful to firmware, RTOS kernels and low-level debugging tools that need to determine whether code is executing normally or inside an exception handler.

The EPSR contains information associated with the processor’s execution state, including state used by the T32 instruction environment and instruction-continuation or conditional-execution mechanisms.

Software typically encounters these status fields through PSR-related register views rather than treating the EPSR as a conventional general-purpose register.

Collectively, the APSR, IPSR and EPSR provide a compact snapshot of what an Armv8-M processor is doing at a particular moment: the APSR describes the result state, the IPSR identifies the exception state, and the EPSR tracks execution state.

This makes the Program Status Registers essential to embedded debugging, exception handling, context switching and low-level firmware development on Armv8-M processors such as Cortex-M23 and Cortex-M33.

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