SEALSQ Unveils Quantum-Resistant Security Chips

Anime-style editorial illustration of quantum-resistant security chips protecting industrial IoT devices, robotics and servers.

SEALSQ is pushing post-quantum cryptography deeper into hardware, unveiling a secure element, a post-quantum Trusted Platform Module and a custom ASIC design path intended to protect connected devices long after today’s public-key cryptography becomes vulnerable.

In its October 14 announcement, SEALSQ said it will demonstrate the technologies at electronica 2026 in Munich in November. The products target a practical problem in the post-quantum transition: encryption algorithms can be updated in software, but secure boot, device identity and private-key storage often depend on chips expected to remain deployed for years.

A recent discussion of Cloudflare’s accelerated post-quantum migration timeline shows why hardware vendors are treating the transition as an engineering problem now rather than a distant possibility.

VaultIC409 puts hybrid cryptography in a secure element

The first device, VaultIC409, is built on SEALSQ’s QS7001 platform. It combines conventional algorithms such as RSA and elliptic-curve cryptography with hardware acceleration for ML-KEM and ML-DSA. SEALSQ says the device includes a hardware root of trust, protected key storage and an SPI interface sized for the larger keys and certificates used by post-quantum systems. Engineering samples are planned for the second quarter of 2027.

SEALSQ demonstrates its post-quantum security work in hardware.

QVault moves post-quantum keys into the TPM

The second device is QVault TPM. A TPM is the small security processor PCs, servers and embedded systems can use to protect keys, verify boot integrity and prove device identity. SEALSQ says QVault can generate and retain ML-KEM and ML-DSA keys on-chip alongside RSA and ECC, allowing manufacturers to move toward post-quantum authentication without abandoning existing security stacks all at once.

That hybrid approach matters because the migration will take years. NIST says organizations should begin migrating now. Its FIPS 203 standard defines ML-KEM for establishing shared secrets, while FIPS 204 defines ML-DSA for digital signatures. Neither standard means a product is automatically secure; implementation, side-channel resistance, firmware, key management and certification still matter.

Cloudflare explains why the industry is accelerating its post-quantum migration planning.

The third piece is custom silicon

SEALSQ is also introducing QASIC through its IC’Alps subsidiary. Instead of selling only a catalog security chip, the company wants manufacturers to build post-quantum functions directly into application-specific silicon for automotive, medical, industrial and critical-infrastructure systems. That can reduce component count and make the root of trust part of the device architecture rather than an add-on module.

The broader security problem reaches well beyond one vendor. BitcoinVersus.Tech recently explained what quantum computers could actually threaten in Bitcoin, examined how cryptographic systems can migrate toward quantum resistance, and covered hardware-rooted security moving directly inside servers.

Why it matters: post-quantum security is starting to move from standards documents into the chips that establish trust inside real devices. The important question is no longer only which algorithms survive a future quantum computer. It is whether manufacturers can deploy those algorithms in hardware that remains secure, certifiable and upgradeable for the full life of the product.

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