Marvell, Microsoft and Oracle are working through the Open Compute Project to standardize a new class of hardware security module built directly into cloud and hyperscale servers. The companies announced the working group on October 13, saying the goal is a silicon-based, attested integrated HSM that can protect cryptographic keys and manage their lifecycle closer to the server hardware using them.
This matters because cryptographic keys sit underneath many of the things cloud infrastructure needs to prove: that firmware is authentic, that a machine booted into an expected state, that an encrypted workload is talking to trusted hardware, and that keys used for storage or network encryption have not been exposed to ordinary software.
Community discussion around Caliptra, the open hardware root-of-trust project that forms part of the broader push toward verifiable server security.
What the new HSM standard is trying to do
The proposal centers on an integrated hardware security module that supports secure key caching, attestation and cryptographic-key lifecycle management at the server level. Instead of forcing every sensitive operation to travel to a distant HSM appliance or service, a server could keep protected key material and trusted cryptographic functions much closer to the workload while still maintaining a hardened security boundary.
The companies are targeting FIPS 140-3 Level 3, a security standard used to validate cryptographic modules. Level 3 adds stronger requirements around physical security, identity-based authentication and protection of sensitive security parameters. The important point is not that every server automatically becomes secure; it is that cloud operators would have a common, testable hardware target for protecting keys and proving the state of the security module.
Thales explains how hardware security modules protect cryptographic keys and perform sensitive crypto operations inside hardened hardware.
Attestation is just as important as key storage
An HSM stores and uses keys, but attestation answers another question: can another system verify that the server and its security hardware are in an approved state? That becomes increasingly important in multi-tenant cloud systems, confidential computing and AI infrastructure where accelerators, CPUs, memory devices and network interfaces may all participate in the same workload.
Marvell engineers discuss Caliptra as a server security hub for distributing protected encryption keys across a system-on-chip.
The idea is related to technologies such as the Trusted Platform Module, but it is not simply a TPM replacement. TPMs are commonly used for measured boot, device identity and platform attestation. An integrated HSM is aimed more directly at high-volume cryptographic operations and protected key management inside server infrastructure.
Earlier hardware-community discussion of Caliptra shows why open roots of trust and remote attestation have become important parts of server-security design.
Why cloud operators want security inside the server
Moving trusted key functions closer to the workload can reduce latency and make security infrastructure easier to scale across huge fleets. It also gives operators another hardware boundary below the operating system. That matters because an attacker who compromises software should not automatically gain access to the keys protecting storage, network traffic or workload identity.
The same chain of trust begins before an operating system starts. Our earlier guides to BIOS versus UEFI and secure server decommissioning show the two ends of that lifecycle: proving what a machine is allowed to boot, then making sure secrets and media are handled correctly when the hardware leaves service.
Marvell, Microsoft and Oracle say an initial technical specification is planned around the 2026 OCP Global Summit, with a version 1.0 specification to follow. The important development is not a finished product shipping everywhere today. It is that three major infrastructure companies are trying to turn in-server HSM security into an open hardware standard that multiple cloud platforms and silicon vendors can implement.
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