Lattice and Arm Add FPGA Security to AI Servers

Illustration of a modern AI server motherboard with a main processor, companion programmable chip, security shield, memory modules, and blue-lit data center racks.

Lattice Semiconductor and Arm are putting a programmable security layer beside the CPU in a new AI-server collaboration aimed at making data-center management more adaptable and easier to secure.

Announced October 7, the joint design combines Arm AGI CPU server platforms with Lattice FPGAs and AMI firmware. In the architecture, the FPGA sits alongside the CPU and baseboard management controller rather than replacing either one. Its job is to provide hardware-level control, platform trust, connectivity, and management functions that can be updated as server requirements change. Lattice says the design also supports the Open Compute Project’s LTPI interface between a Host Processor Module and a Datacenter Secure Control Module.

Arm’s official OCP-era post highlights fresh AGI CPU benchmark results and the open infrastructure push surrounding the platform.

The FPGA is not the AI accelerator here

The important distinction is role. The Lattice FPGA in this design is not being presented as the device that runs the large AI model. It acts as a programmable companion chip around the server’s management and trust infrastructure. That can matter because modern AI racks increasingly depend on a chain of boot firmware, management controllers, sensors, power states, networking, and remote-service functions that must remain trustworthy even when the main processor is unavailable.

BitcoinVersus.Tech has been following that control-plane shift closely. Lattice previously outlined an open control plane for AI racks, then moved post-quantum functions into a hardware root of trust. The Open Compute Project has now also launched a broader secure control-plane effort for AI data centers.

Arm explains the AGI CPU and why agentic AI is increasing the importance of rack-level CPU infrastructure.

Why this matters for AI racks

As AI clusters grow, failure recovery and secure remote management become infrastructure problems, not just software problems. A programmable companion device can help operators adapt control logic, interface between platform components, and establish trust before the operating system or accelerator software starts. Igor’s Lab similarly describes the collaboration as using FPGAs for security and management around increasingly complex AI servers.

The companies demonstrated the joint platform during the 2026 OCP Global Summit in San Jose. The larger trend is clear: the AI-hardware race is expanding beyond GPUs and CPUs. The chips that boot, monitor, authenticate, connect, and recover those processors are becoming part of the competitive infrastructure stack too.

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