AI infrastructure is becoming more specialized at the silicon level. The latest example is a processor designed not primarily to train an AI model, but to help that model retrieve information.

Dnotitia says the first fabricated samples of its Vector Data Processing Unit, or VDPU, have returned from the fab and are now undergoing chip-level characterization. The company plans to begin system evaluations using the actual ASIC during the fourth quarter of 2026.

The distinction between the new silicon and Dnotitia’s existing performance results is important. Dnotitia reported that a server containing four VDPU cards achieved as much as 5.77× the vector-search throughput of a dual-socket CPU-only comparison system while maintaining equal or better recall. In a 4,096-dimensional multimodal workload, the system also reduced host CPU usage during index building by 92% and host-memory usage by 73%.

Those measurements came from the company’s FPGA evaluation platform—not the newly fabricated ASIC. Dnotitia explicitly says the figures do not represent final ASIC performance. Independent silicon benchmarks therefore remain an important missing piece.

Why Vector Search Is Becoming a Hardware Problem

Retrieval-augmented generation, semantic search and agentic AI systems repeatedly search large collections of vector embeddings to locate information relevant to a query. That creates a workload different from the matrix-heavy computation normally associated with GPU-based model training and inference.

Dnotitia’s architecture attempts to separate those jobs. Instead of consuming CPU resources—or using expensive GPU memory for retrieval—the VDPU provides a dedicated processing layer for vector search. The company says its FPGA implementation has been validated with FAISS, Milvus and hnswlib across brute-force KNN, IVF, NSW and HNSW indexes.

The concept resembles a broader semiconductor trend BitcoinVersus.tech continues to track: workloads that become sufficiently important and repetitive eventually become candidates for specialized silicon. Bitcoin mining offers an unusually clear historical example. General-purpose CPUs gave way to GPUs, FPGAs and ultimately SHA-256 ASICs as miners pursued greater hashrate per watt. AI infrastructure is following a different technical path, but the economic pressure is familiar: move a heavily repeated computation onto hardware optimized specifically for it.

First Silicon Is the Next Test

Dnotitia is targeting as much as a 10× vector-search performance improvement over a CPU-based server for its ASIC system, but that remains a company target, not a demonstrated result from production silicon.

The Q4 evaluation period should therefore be more informative than the headline performance target itself. Engineers will need actual silicon measurements for throughput, recall, power consumption, thermal behavior, host-resource utilization and system-level performance before the VDPU’s practical efficiency can be judged.

That is what makes the first-silicon milestone significant: Dnotitia’s idea is leaving the FPGA stage and becoming a physical chip whose architecture can finally be tested on its own merits.

Source: Dnotitia — AI Infra Summit 2026 announcement

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