Axelera AI has launched Europa, a second-generation AI accelerator rated at 629 TOPS with a 45 W TDP, while expanding into validated Dell and Supermicro systems for enterprise and edge inference.

The Sept. 15 launch moves the European chip startup beyond its first-generation edge focus toward heavier AI workloads in enterprise servers, robotics and AI factories.

629 TOPS at 45 watts

Europa uses eight second-generation AI processing cores and 16 RISC-V vector-processing cores. Axelera lists 128 MB of L2 SRAM, 200 GB/s of DRAM bandwidth and onboard video decoding, with support for INT4, INT8 and INT16 workloads.

The company is positioning the architecture around inference efficiency rather than the extreme power envelopes associated with many high-end accelerator platforms. Axelera says Europa can support generative AI, computer vision, robotics, autonomous systems and other local inference workloads.

Dell and Supermicro systems expand the hardware footprint

Axelera says its Europa-based Edge 232p accelerator is entering validated systems from Dell Technologies and Supermicro. Data Center Dynamics reported availability in Dell XE5 and Supermicro 111AD servers.

That matters because accelerator adoption depends on more than the semiconductor itself. Validated server platforms give operators a more conventional route to deploy cards with known thermal, electrical and software configurations.

AI-factory contracts add commercial weight

Reuters reported that Axelera has signed multiple contracts to supply chips to AI factories. CEO Fabrizio Del Maffeo said the company has more than 600 customers and signed deals worth tens of millions, while a $1.5 billion sales pipeline represents potential business rather than booked revenue.

Europa is also being positioned for European AI infrastructure projects, including Italy’s IT4LIA AI Factory and Luxembourg’s MeluXina infrastructure.

RISC-V handles more work on the accelerator

Europa’s 16 RISC-V vector cores are designed to perform pre-processing and post-processing on the accelerator, reducing work that otherwise has to return to the host CPU. Keeping more of the pipeline local can reduce data movement and leave host compute available for application logic.

The architecture also provides a bridge toward Axelera’s planned Titania chiplet platform, which the company is targeting at larger data-center and HPC systems.

Sources: Axelera AI and Data Center Dynamics.

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