AMD has started sampling a Versal AI Core adaptive SoC in a new space-grade package built for missions that may remain in service for as long as 15 years. The XQRVC1902 combines programmable logic, AI and DSP acceleration, onboard memory and high-speed transceivers with packaging engineered for the thermal, mechanical and radiation demands of long-duration spaceflight.

According to AMD’s October 1 announcement, early-access customers are receiving engineering samples while the company tests the device toward MIL-PRF-38535 Class Y qualification. StorageReview independently detailed the sampling milestone and the expected second-half 2027 arrival of flight-qualified units. AMD Embedded also announced the Class Y XQRVC1902 samples on X.

The package is part of the semiconductor design

The chip itself is only part of the reliability problem. AMD says the enhanced organic lidless package uses conservative design rules, an upgraded substrate material and space-grade capacitors with flight heritage. Those choices are intended to reduce thermal and mechanical stress over missions ranging from geosynchronous and cislunar orbit to heliocentric and deep-space operations.

The lidless design also improves the thermal path from the silicon. That makes packaging a functional part of the compute system rather than simply a protective enclosure—an idea increasingly visible across advanced semiconductors. BitcoinVersus.Tech recently examined how Applied Materials and Besi are pushing hybrid bonding into larger advanced packages.

AI compute moves onto the spacecraft

Versal AI Core is designed to process data where it is generated. In space, that can mean running vector algorithms, sensor processing and inference onboard instead of transmitting every raw observation to Earth first. AMD’s radiation-tolerant XQR architecture can also be reconfigured in orbit, allowing the same hardware platform to adapt as mission requirements change.

That heterogeneous approach resembles the broader chiplet trend on Earth, where specialized compute blocks are connected instead of forcing every workload through one architecture. AMD recently demonstrated another branch of that strategy when Versal RF added six UCIe links for open chiplet connectivity.

Why Class Y matters

AMD describes Class Y as the highest quality and reliability level under the relevant U.S. military microelectronics specification for spaceflight components. The qualification process is still underway, so today’s parts are engineering samples rather than finished flight-qualified production units. AMD expects those qualified units in the second half of 2027.

The new package remains pin-compatible with existing VC1902 devices in the 2,197-ball BGA package. That gives engineering teams a path to build and validate systems around today’s samples while waiting for the flight-qualified version.

Semiconductors are being designed around the mission

The XQRVC1902 is another example of semiconductor specialization moving beyond the die. AI accelerators need memory and interconnect packaging optimized for enormous bandwidth; spacecraft need packaging optimized for years of radiation exposure, thermal cycling and launch stress. In both cases, the useful product is the complete physical compute system.

That system-level view is also visible in SMART Photonics and GlobalFoundries combining different semiconductor materials in one foundry flow. The common direction is clear: performance increasingly depends on how silicon, substrates, interconnects and packages are engineered together.

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