Siemens signed an agreement on November 10, 2026, to acquire Lauterbach, a German developer of TRACE32 tools used to debug and trace embedded software. The proposed deal could connect Siemens’s semiconductor emulation and verification systems with the debugging software engineers use to inspect processors and complex systems-on-chip. Siemens says Lauterbach generated roughly €60 million in 2025 revenue, serves more than 1,200 customers and employs about 170 people. The purchase price was not disclosed.
Why combining chip verification and software debugging matters
Semiconductor teams increasingly write and test firmware, drivers and operating-system components before finished silicon exists. A complex chip can pass hardware-level tests yet later encounter bugs when embedded software accesses memory, peripherals, processors or interrupts in an unexpected sequence. A combined toolchain could help identify such interactions during design rather than after manufacturing.
Siemens already provides hardware-assisted verification through its Veloce portfolio, including emulation and FPGA-based prototyping. Lauterbach’s TRACE32 environment supports instruction-level debugging, multicore analysis and real-time execution tracing on physical and virtual targets. Siemens calls the planned integration a shift-left workflow: debugging software while the hardware design is still in development. The technical benefit is plausible, but no independently measured schedule reduction or defect-rate improvement accompanied the acquisition announcement.

What Lauterbach brings to Siemens
Founded in 1979, Lauterbach builds tools that let engineers pause processor execution, examine registers and memory, set breakpoints and capture traces while embedded systems run. A TRACE32 PowerDebug module connects a development computer to a target through interfaces such as JTAG, often with processor-specific probes. Lauterbach’s product documentation describes the modular hardware and trace extensions used to investigate multicore behavior and hard-to-reproduce faults.
Its customer base spans semiconductors, automobiles and telecommunications. Siemens reports more than 1,200 customers, roughly 170 employees and €60 million in 2025 revenue. Those measures show the scale of Lauterbach’s existing business; they do not establish an acquisition valuation, revenue synergy or market share. Financial terms remain private. Siemens’s claim of future revenue synergies is a management expectation rather than a realized gain.
Pre-silicon work is becoming more software-intensive
An ASIC is built for a specific task, while an FPGA can be reconfigured repeatedly; the architectural differences explain why FPGA-based prototyping can help teams validate designs before fabrication. Siemens has also worked on moving chip test data across PCIe and USB, another stage of verification. Neither existing technology automatically guarantees that a merged TRACE32/Veloce workflow will operate as one seamless product.
Engineers developing software-defined vehicles, AI accelerators and industrial controllers must consider hardware/software interaction, security boundaries and functional safety. Time-sensitive networking in industrial FPGAs illustrates where deterministic operation and visibility matter. Other vendors are also experimenting with AI-assisted chip design tools, although design automation and post-silicon debugging address different tasks.
Closing is expected in 2027, not completed
Both companies expect the acquisition to close in the first half of 2027, subject to regulatory approvals and other conditions. Siemens has announced plans for a unified verification workflow, not an already delivered commercial integration. The companies have not published a combined-product release date, migration terms, licensing changes, or independent comparative benchmarks.
The next meaningful tests will be whether developers can transfer software-debug sessions between virtual prototypes, emulated hardware and actual chips without losing trace context; whether integrations preserve familiar TRACE32 workflows; and whether users can demonstrate faster defect resolution under measured conditions. Until closing and product validation, the principal confirmed news is an acquisition agreement linking two complementary engineering tool portfolios.
Primary sources: Siemens AG, November 10, 2026 acquisition announcement; Lauterbach, November 10, 2026 statement; Siemens EDA explanation of Veloce prototyping, November 13, 2025. Historical manufacturer video demonstrations provide background rather than independent tests of the future combined workflow.
Editor’s note: Featured colored-pencil artwork is an original technical illustration rather than a photograph of the proposed acquisition. Manufacturer media is labeled. Article is technical news, not investment advice.

Leave a Reply