semiconductors
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Lattice Semiconductor is preparing to show an open management architecture for AI data centers that reaches from low-level silicon and firmware all the way to rack-scale telemetry, security and infrastructure control. The demonstrations are scheduled for the 2026 OCP Global Summit in San Jose from October 12 through October 15. The AI rack is becoming…
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South Korean custom-silicon company SEMIFIVE has signed a contract worth approximately $52 million with an unnamed U.S. AI fabless company to develop a next-generation data-center inference accelerator, marking one of the company’s largest North American ASIC wins to date. The announcement says the project will use SEMIFIVE’s end-to-end custom silicon model, covering architecture implementation, physical…
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Samsung Electronics and five Samsung affiliates are committing a combined $1 billion to Helix Digital Infrastructure, adding one of South Korea’s largest industrial groups to a platform built to finance and develop the physical systems behind hyperscale artificial intelligence. The company says Samsung Electronics will provide $500 million, while Samsung C&T, Samsung Life Insurance, Samsung…
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Cerebras Systems and Gimlet Labs plan to deploy roughly 100 megawatts of wafer-scale AI inference capacity, giving the young cloud company a large new pool of specialized compute built around Cerebras’ CS-4 systems. The chipmaker says the agreement will make Gimlet a launch partner for CS-4, while independent reporting says the hardware is expected to…
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Dutch deep-tech company Morphotonics has raised more than €40 million in Series B funding as it scales its large-area nanoimprint lithography platform beyond augmented-reality displays and into optical components for AI data centers. The company says the financing will accelerate manufacturing technology for AR waveguides, co-packaged optics and other next-generation photonic applications. Independent reporting says…
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Siemens and TSMC are pushing agentic AI deeper into semiconductor engineering with a workflow that can automatically detect and correct physical chip design-rule violations instead of stopping at diagnosis. The September collaboration combines Siemens’ Calibre physical-verification platform, Aprisa place-and-route technology and Solido simulation and design-environment tools with TSMC process technology. The result is an AI-assisted…
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Ambarella is separating its low-power AI engine from the rest of its system-on-chip architecture. The new X7 is the company’s first standalone CVflow accelerator, built to add modern AI inference to existing Arm and x86 systems without forcing manufacturers to redesign the host platform. The company says X7 operates inside a 2-to-5-watt power envelope in…
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