AI data centers are running into a simple physical problem: copper gets harder to scale as bandwidth rises, traces get shorter, and the power cost of moving bits starts competing with the power used to compute them. Coherent’s answer at ECOC 2026 is to move more of that traffic onto light—and to move the optics physically closer to the switch silicon.
In its ECOC 2026 technology announcement, Coherent showed a stack that spans 3.2T pluggable transceivers, a 6.4T near-packaged optical engine, co-packaged optics, specialty fiber, optical circuit switching and transport systems. The centerpiece tying those pieces together is PhotonLink, a platform intended to package Coherent’s lasers, silicon photonics, fiber assemblies, detectors and precision manufacturing into complete optical subsystems for AI infrastructure.
6.4T NPO moves the optics toward the switch ASIC
The important part is not only the 6.4-terabit number. It is where the optical engine sits.
Traditional pluggable optics live at the front panel of a switch. Electrical signals must travel from the switch ASIC across the board to those modules. Near-packaged optics, or NPO, shortens that electrical path by placing the optical engine much closer to the switching silicon. Co-packaged optics goes farther still by integrating optics next to, or inside the same package environment as, the compute or networking device.
That architecture matters because every millimeter of high-speed electrical routing becomes harder to manage as lane rates climb. Shorter electrical reaches can reduce signal-conditioning burden and make more of the long-distance movement optical instead.
A specific X post covering Coherent’s ECOC demonstrations highlighted the same combination: 3.2T transceivers, a 6.4T optical engine and PhotonLink for CPO, NPO and chip-to-chip connectivity.
PhotonLink is an attempt to make the optical stack one system
Converge Digest’s technical coverage describes PhotonLink as a broader shift from selling individual photonic components toward supplying complete optical subsystems. That includes the light source, modulation, fiber attachment, transmission and detection pieces that have traditionally been sourced and integrated separately.
That kind of vertical integration becomes more valuable as optical packaging moves closer to expensive AI silicon. A bad connector, unstable laser, poor fiber attach or thermal problem is no longer an isolated networking inconvenience; it can affect the performance and serviceability of an entire accelerator fabric.
BitcoinVersus.Tech recently covered Ciena’s move from 1.6T coherent optics toward 6.4T co-packaged optical engines. Coherent is attacking the same bandwidth wall from a different angle: not just faster links, but a component-to-subsystem platform that can support pluggable, NPO, CPO and future chip-to-chip optical designs.
Fiber density is becoming a system-level constraint
Moving more traffic onto light solves only part of the problem. The fibers still have to fit inside racks, chassis and cable pathways without making installation and repair unmanageable.
That is why the optical-engine race is happening at the same time as a physical-density race. BitcoinVersus.Tech’s recent look at Corning’s four-core fiber and denser AI-network cabling showed the other half of the equation: higher optical bandwidth has to be matched by connector, cable and fiber designs that can actually be routed at data-center scale.
It also explains why photonics technologies developed in one market keep migrating into another. MicroVision’s effort to bring lidar-derived photonics into AI data-center networking is another sign that the industry is searching across laser, sensing and packaging disciplines for ways to move more data without turning every rack into a power and thermal problem.
The front-panel transceiver is no longer the end state
The most useful way to read Coherent’s announcement is as a roadmap of shrinking electrical distance. Pluggables remain practical because they are modular and replaceable. NPO pulls the optics inward to reduce electrical reach. CPO pushes that integration even closer to the ASIC. Chip-to-chip optical links could eventually remove electrical interconnects from places where they are still considered normal today.
Why this matters for data-center technicians and engineers
For field teams, this transition changes what “network hardware” looks like. More optics near the ASIC means fiber handling, cleanliness, connector inspection, thermal control and replacement strategy become even more tightly coupled to switch and accelerator maintenance.
It also means the boundary between a switch board and an optical subsystem gets less obvious. A future rack technician may troubleshoot link power, fiber attach, optical engines and switch silicon as parts of one integrated path rather than treating the transceiver as a removable box at the front of the chassis.
Coherent’s 6.4T demonstration is not the finish line. It is evidence that AI networking is moving into a phase where packaging location, fiber density and power per bit matter as much as the headline bandwidth. The faster accelerators become, the more the network has to behave like part of the computer.
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